AC Verilog Design Flow
Design, implement, and verify Verilog/SystemVerilog modules with spec-driven development, self-checking testbenches, and automated simulation workflows. Supports Synopsys VCS, Cadence Xrun, Icarus Verilog simulators, and slang static syntax checker. Use when the user needs to write Verilog modules, design digital circuits, create counters/FSMs/interfaces, simulate and verify designs, or analyze VCD waveforms.
As a process C 58/100 · Has gaps — weak spots: inputs and preconditions, consistency, running it twice
How to improve
- Your own cases (evals/evals.json, 4–6 real requests with expected answers): the full check would then run those instead of a model-drafted suite.
- A spec.yaml with trigger phrases and assertions — a behaviour contract for CI; `skilltest init` writes a template.
Guard findings · 0
✓ No critical or high findings
Files scanned: 5. Evidence is masked. Grey chips explain why severity was lowered.
Against the Agent Skills spec
- warning
name-formatname should be kebab-case (lowercase letters, digits, hyphens)
Process rating: all ten parameters 58/100
- 0Inputs and preconditions. Does not say what the process needs to start
- 30Running it twice. 5 mutating operations with no state check
- 40Consistency. Frontmatter name (Verilog Design Flow) differs from the folder (verilog-design)
- 50Failures and branches. 0 branches, has a failure section
- 60Tools and files. Uses tools (python) that frontmatter does not declare
- 60Result and completion. Output format stated, no completion criterion
- 70When it triggers. States when to use, but not when not to
- 85Steps. 68 steps, 1 vague phrases
- 100Execution cost. Instruction body is 2675 tokens
- 100Progress reporting. Reports progress
- medium Safety rules and hard prohibitions inside a skill: they belong in the system prompt, here they protect nothing
- low The response is described with custom markup (6 tags): a typed call is more reliable
Everything here is measured from the skill text rather than judged by a model, so the numbers are checkable. A parameter weighs more when it is a more common reason for the process to stall.
Quality signals
- +5Description has no quoted example phrases that should trigger the skill
- +4Description does not say when NOT to use the skill (false activations)
- +1No license
- +2Single-language instructions
- +3Description length 412: enough signal without eating the budget
- +4Structure: 31 headings
- +3Step-by-step instructions: 68 items
- +3Output format is stated explicitly
- +4Has examples (13 code blocks)
- +4Reference files are cited in the instructions (1 of 1)
- +3All 2 scripts are documented
Quality base 70; lint remarks subtract, signals add up to 100. Result: 89.